发明名称 APPARATUS FOR TESTING OPERATION OF INTEGRATED CIRCUIT
摘要 PURPOSE:To make it possible to perform the bump test of plural integrated circuits mounted to a circuit unit apparatus simultaneously and collectively by a control apparatus and a power source voltage variable apparatus, by providing the circuit unit apparatus capable of mounting plural integrated circuits. CONSTITUTION:A memory unit 4 is constituted so as to be able to mount plural memory integrated circuits. On the other hand, a control apparatus 5 is constituted, for example, from an operation treatment apparatus comprising a stored program system so as to carry out reading and writing treatment of operation testing data with respect to the memory integrated circuit mounted to the aforementioned memory unit 4 and to detect the operational error of each memory integrated circuit from the result thereof. In addition, the power source voltage variable apparatus 3 can supply DC voltage Vc with a desired amplitude value or power source voltage of which the amplitude Vp is changed in a desired repeated cycle T to each memory integrated circuit mounted to the memory unit 4. By performing the reading and writing treatment and operational error detecting treatment of the operation testing data by a control apparatus and varing power source voltage Vc or Vp generated from the power source voltage variable apparatus 3, it is tested whether each memory integrated circuit is abnormally operated with respect to the change of power source voltage or not.
申请公布号 JPS595972(A) 申请公布日期 1984.01.12
申请号 JP19820115931 申请日期 1982.07.02
申请人 MITSUBISHI DENKI KK 发明人 HOSOMI SHIYUNSUKE
分类号 G01R31/28;G01R31/316;H01L21/66 主分类号 G01R31/28
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