发明名称 DELAYED LOCKED LOOP, AND METHOD OF CONTROLLING THE INITIAL DELAY TIME
摘要 A delay locked loop capable of controlling initial delay time and a method for synchronizing delay are provided to control the initial delay time by using a user control signal. A phase detector(302) outputs a control signal corresponding to a phase difference by detecting the phase difference between an external clock and an internal clock. An initial delay time control part(306) outputs a delay control signal to control initial delay time determined by the number of operations of an initial delay cell, by receiving a user control signal inputted by a user. A delay circuit(308) comprises a plurality of post delay cells connected to the initial delay cell serially, and determines the initial delay time by controlling the number of operations of the initial delay cell according to the delay control signal by receiving the delay control signal and the external clock, and outputs the internal clock delayed by the initial delay cell and the post delay cells.
申请公布号 KR20080079905(A) 申请公布日期 2008.09.02
申请号 KR20070020526 申请日期 2007.02.28
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, SIN HO;SHIN, SANG WOONG
分类号 G11C8/00;G11C7/20;G11C7/22 主分类号 G11C8/00
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