| 摘要 |
A current driven DAC architecture uses a single resistance string arranged to have a cyclic configuration and a plurality of nodes, one of the nodes being connected to a known potential, e.g., ground potential, and at least two current sources connected to selected ones of said nodes through operable switches, and an output connected to a selected one of said nodes. In one modification, 2<SUP>2n-2 </SUP>LSB (least significant bit) voltage levels are generated as outputs from 2<SUP>n </SUP>cyclic string resistors and two current sources. In another modification, spurious-free resolution of (2n-2) bits and (2n-1) bit resolution with lower SNDR are achieved by using 2<SUP>n </SUP>resistors and two current sources. In one described embodiment, 2<SUP>n </SUP>unit impedances in the cyclic string result in 2(n-1) bit resolution. Thus, the single cyclic string of resistances achieves the function of both MSB sub-string and LSB sub-string.
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