发明名称 Manufacturing method of high-voltage MOS transistor
摘要 In the manufacturing method of a high-voltage MOS, a structural body is prepared. The structural body includes a semiconductor substrate of a first conductivity type, a gate electrode formed on the semiconductor substrate via a gate insulation film, and first conductive layers of a second conductivity type extending from the surface to the inside of the semiconductor substrate. Main sidewalls are formed on the first conductive layers, and contact whole side surfaces of the gate electrode. Side surfaces of the main sidewalls are perpendicular to the surface of the semiconductor substrate. At least one sub-sidewall is formed on at lest one first conductive layer, and contacts a whole side surface of the main sidewall. Impurities are doped into exposed regions of the first conductive layer through the mask using the gate electrode, the main sidewalls and the sub-sidewall, to thereby form heavily-doped impurity regions of the second conductivity type.
申请公布号 US2007212842(A1) 申请公布日期 2007.09.13
申请号 US20060588220 申请日期 2006.10.27
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 MAEKAWA HISAYUKI
分类号 H01L21/336 主分类号 H01L21/336
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