| 摘要 |
A sense amplifier circuit and a sense amplifier based flip-flop including the same are provided to improve operation speed of a memory device by reducing delay time from a clock signal to an output signal and thus to easily design a rear stage of the sense amplifier based flip-flop. In a sense amplifier based flip-flop which operates in response to a clock signal, a first latch part(32) outputs a second level signal to a first output stage when the clock signal has a first level and outputs a pair of evaluation signals corresponding to a pair of input signals to the first output stage when the clock signal has a second level. A second latch part(30) latches the evaluation signals outputted from the first output stage and then outputs the latched evaluation signals to a second output stage. A delay attenuation part(33,34) is connected to a current passing node of the first latch part, and reduces signal delay time from transition time of the clock signal from a first level to a second level to the time when the evaluation signals are output from the second output stage.
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