发明名称 Viterbi decoding apparatus
摘要 The present invention can reduce power consumption at the time of tracing. The present invention provides a viterbi decoding apparatus for decoding convolution codes, which includes a path memory unit that stores one of two paths toward respective transition states of a convolution code, as a selected path, for a plurality of continuous time points, a tracing unit that traces a selected path stored in the path memory unit in a reversed-time direction, thereby decoding a convolution code at respective time points, each of the time points being prior to a predetermined trace-skipping period, and a control unit that controls the path memory unit, wherein the path memory unit has a storage area designed to store selected paths assuming respective transition states at respective time points, the storage area is divided into sub-areas from the lowest order of transition state, each of the sub-areas corresponding to predetermined number of bits, and reading data can be stopped for each sub-area, and the control unit designates sub-areas from which no selected path needs to be read at respective time points so as to stop reading data from the designated sub-areas.
申请公布号 US2007104296(A1) 申请公布日期 2007.05.10
申请号 US20060473126 申请日期 2006.06.23
申请人 MIYAUCHI TOSHIYUKI;MIZUTANI YUICHI 发明人 MIYAUCHI TOSHIYUKI;MIZUTANI YUICHI
分类号 H03D1/00;H03M13/03 主分类号 H03D1/00
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