A SEMICONDUCTOR DEVICE INCLUDING THE ROM INTERFACE PAD

摘要

A semiconductor device having a pad for ROM(Read-Only-Memory) interface is provided to reduce an inner space of a chip by employing detachable via contacts and pads for ROM interface. A multi layer(120) is provided on a semiconductor substrate(110) and is comprised of a plurality of layers on which circuit patterns are formed. A test circuit pattern(180) is formed in a predetermined region of the multi layer. An inter-metal dielectric(140) is arranged on the test circuit pattern. A multiplicity of via contacts(160) are formed on the inter-metal dielectric. Pads(150) for ROM interface are located on the inter-metal dielectric, connected electrically to the test circuit pattern through the via contacts, and separated from each other. The via contacts and the pads are included during a test process and then removed during a mass-production process.