发明名称 Method and apparatus for combined encoder/syndrome computer with programmable parity level
摘要 Methods and apparatus are provided for a combined encoder/syndrome computer with a programmable parity level. In one embodiment, a circuit is disclosed that generates check symbols during an encoding operation and generates error syndromes during a decoding operation. The circuit comprises a plurality of subfilters grouped into a multiple degree polynomial filter, where the number of multiple degree subfilters is less than a maximum number of symbols of redundancy.
申请公布号 US2006212783(A1) 申请公布日期 2006.09.21
申请号 US20050079634 申请日期 2005.03.14
申请人 ASHLEY JONATHAN J;WILLIAMSON CLIFTON 发明人 ASHLEY JONATHAN J.;WILLIAMSON CLIFTON
分类号 H03M13/00 主分类号 H03M13/00
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