发明名称 MULTIPLE EXPOSURE METHOD FOR CIRCUIT PERFORMANCE IMPROVEMENT
摘要 An optical lithography method is disclosed that uses multiple exposures to decrease the minimum grid pitch of regularly spaced features. The desired grid pitch is selected to minimize the circuit area growth arising from the use of a grid constraint during layout. The desired grid is decomposed into at least two interleaved mask grids having a mask grid pitch that is greater than the desired grid pitch. Each mask grid is exposed to print a portion of the desired grid until the complete desired grid is printed to the die.
申请公布号 EP1597631(A4) 申请公布日期 2006.09.13
申请号 EP20040715238 申请日期 2004.02.27
申请人 THE UNIVERSITY OF HONG KONG 发明人 WANG, JUN;WONG, K. ALFRED
分类号 G03F1/00;G03F7/20 主分类号 G03F1/00
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