| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a system clock distribution device and a system clock distribution method capable of reducing the skew between system clock and synchronous signal while reducing cost. <P>SOLUTION: This system clock distribution device for matching timings of data by use of synchronous signal, comprises an oscillation part 1 and a PLL 2 generating a periodic synchronous signal; a memory storing data; at least one CPU performing arithmetic processing using the data stored in the memory; and at least one memory access controller controlling the access from the CPU to the memory. A system clock having a frequency integral times the synchronous signal is generated, and the CPU and the memory access control are controlled based on the operation by the system clock. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
