发明名称 Method and device for checking a circuit for adherence to set-up and hold times
摘要 A method and a device for checking a circuit path of a circuit for adherence to set-up and hold times are provided. A timing behavior of the circuit path is designated as being correct if at least one pair of set-up and hold times from predefined set-up and hold times that are for the circuit path does not produce any timing infringement in the circuit path. Otherwise, the timing behavior of the circuit path is classified as being defective. This decreases the number of circuit paths wrongly designated as being defective by the use of pairs of predefined set-up and hold times and decreases the chip area for buffers.
申请公布号 US2006117287(A1) 申请公布日期 2006.06.01
申请号 US20050226514 申请日期 2005.09.13
申请人 INFINEON TECHNOLOGIES AG 发明人 BERGLER STEFAN;LANG ALFRED
分类号 G06F17/50;G06F9/45 主分类号 G06F17/50
代理机构 代理人
主权项
地址