| 摘要 |
The invention relates to a hub module for connecting one or more memory devices. Said module comprises an address input for connection to an address bus, in order to receive an address of the memory area to be addressed, an address output for connection to an additional address bus, an address decoder unit for addressing one of the connected memory devices using an address available at the address input, or for supplying said available address to the address output. The invention is characterised in that the address decoder unit has a redundancy unit, which, if an error has been identified in a memory area of the one or more connected memory devices, permits a redundant memory area to be addressed instead of the addressed memory area. |
