发明名称 Method and apparatus to handle parity errors in flow control channels
摘要 Methods, software and systems for handling parity errors in flow control channels are presented. A network processor is provided having a flow control message First In First Out (FIFO) buffer and wherein the FIFO buffer includes a parity field. The network processor is included as either or both of an Ingress network processor and an Egress network processor and is used within a CSIX system or an NPSI NPE system.
申请公布号 US2005141535(A1) 申请公布日期 2005.06.30
申请号 US20030750999 申请日期 2003.12.30
申请人 KUO CHEN-CHI;LAKSHMANAMURTHY SRIDHAR;MIIN JEEN-YUAN;NG RAYMOND 发明人 KUO CHEN-CHI;LAKSHMANAMURTHY SRIDHAR;MIIN JEEN-YUAN;NG RAYMOND
分类号 H04L1/00;H04L12/28;H04L12/56;(IPC1-7):H04L12/28 主分类号 H04L1/00
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