| 摘要 |
FIELD: electronic engineering. ^ SUBSTANCE: proposed thyristor in which four successive semiconductor layers are applied one onto other has its cathode and anode made on external surfaces of first and fourth layers, respectively. First and third layers are of first polarity of conductivity, second and fourth ones, of second polarity of conductivity; third layer incorporates recombination charge-carrier centers nonuniformly distributed throughout its height; second layer is made of material having lower minimal resistivity than that of third layer. Third-layer region contiguous with second layer whose thickness is not over 20% of that of third-layer thickness has minimum 10% of total amount of recombination centers in third layer; third-layer region contiguous with fourth layer whose thickness is not over 20% of that of third layer has more recombination centers than third-layer region contiguous with second layer but not over 90% of total number of recombination centers in third layer, concentration of recombination centers Nt(X) in central part of third layer between two boundary regions being distributed to meet following condition: where X is recombination center coordinate controlling distance of recombination center from boundary between second and third semiconductor layers, mm; X* is thickness of third-layer region contiguous with second semiconductor layer that has minimum 10% of total number of recombination centers in third layer, mm; X** is coordinate of boundary between third-layer region contiguous with fourth semiconductor layer and remaining part of third layer equal to thickness of third semiconductor layer minus thickness of third-layer region contiguous with fourth semiconductor layer, mm; N*t is mean concentration of recombination centers in third-layer region contiguous with second semiconductor layer, cm-3; N**t is mean concentration of recombination centers in third-layer region contiguous with fourth semiconductor layer, cm-3. ^ EFFECT: optimized power characteristics of device at high speed due to reduced reverse-recovery energy loss per unit surface area of semiconductor wafer. ^ 1 cl, 1 dwg |
