发明名称 Reduction of cache miss rates using shared private caches
摘要 Methods and systems for reducing cache miss rates for cache are disclosed. Embodiments may include a computer system with one or more processors and each processor may couple with a private cache. Embodiments selectively enable and implement a cache re-allocation scheme for cache lines of the private caches based upon a workload or an expected workload for the processors. In particular, a cache miss rate monitor may count the number of cache misses for each processor. A cache miss rate comparator compares the cache miss rates to determine whether one or more of the processors have significantly higher cache miss rates than the average cache miss rates within a processor module or overall. If one or more processors have significantly higher cache miss rates, cache requests from those processors are forwarded to private caches that have lower cache miss rates and have the least recently used cache lines.
申请公布号 US2005071564(A1) 申请公布日期 2005.03.31
申请号 US20030670715 申请日期 2003.09.25
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 LUICK DAVID A.
分类号 G06F12/08;G06F12/12;(IPC1-7):G06F12/00 主分类号 G06F12/08
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