发明名称 READING/WRITING CIRCUIT OF MEMORY CELL
摘要 PROBLEM TO BE SOLVED: To efficiently perform data reading/writing (refresh) by eliminating special duration for pre-charge. SOLUTION: The reading/writing circuit of memory cells comprises: the memory cells which store electric charge so as to correspond to the level of a bit line Bit through instructions from writing words WWrd in a writing mode and transits the level of the bit line Bit in accordance with the stored electric charge through instructions from reading word lines RWrd in a reading mode; and a transistor 11 which connects the bit line Bit to a power supply voltage Vdd in the reading mode. In addition, the reading/writing circuit of the memory cells comprises: an inverter 12 which reads the data written on the memory cells depending on whether the level of the bit line Bit is transited from pull-up level or not in the reading mode; and an inverter 15 which selects read data or data to be newly written through a selector 14 and transits the level of the bit line Bit to the corresponding level in the writing mode. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004259444(A) 申请公布日期 2004.09.16
申请号 JP20040176038 申请日期 2004.06.14
申请人 YAMAHA CORP 发明人 TANAKA TAISHIN
分类号 G11C11/409;(IPC1-7):G11C11/409 主分类号 G11C11/409
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