发明名称 |
Semiconductor memory device having a gate electrode and a diffusion layer and a manufacturing method thereof |
摘要 |
A semiconductor memory device having a gate electrode and a diffusion layer, comprising a plurality of memory cells each of which including the gate electrode and the diffusion layers; a first contact layer connected to one of the diffusion layer of the memory cell; a second contact layer connected to the first contact layer; a bit line connected to the second contact layer; and a conductive layer connected to at least two of the diffusion layers that are other than the diffusion layer connected to the first contact layer, at least two of the diffusion layers being arranged in a direction vertical to the bit line, a height of the conductive layer substantially being same as a height of the first contact layer.
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申请公布号 |
US2004079985(A1) |
申请公布日期 |
2004.04.29 |
申请号 |
US20030602595 |
申请日期 |
2003.06.25 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
YONEHAMA KEISUKE;SAKAGAMI EIJI;FUJIMOTO HIROMASA;KOIDO NAOKI |
分类号 |
H01L21/28;H01L21/768;H01L21/8247;H01L27/115;H01L29/423;H01L29/788;H01L29/792;(IPC1-7):H01L21/823 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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