Apparatus for reducing the overhead of cache coherency processing on each primary controller and increasing the overall throughput of the system

摘要

A bridged controller for reducing the overhead of cache coherency processing on each of a plurality of primary controllers and increasing the overall throughput of the system. The bridged controller interfaces with dual-active pair of host-side controllers and the backend disk drive buses. The third controller allows a doubling of the number of backend busses, reduces the overhead of cache coherency processing on each primary host-side controller and doubles the overall throughput.