发明名称 BOOSTING POTENTIAL GENERATING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a boosting voltage generating circuit in which of reduction of supply capability of a compensation current caused by a counter flow of a current is not caused. SOLUTION: Timing and phases of a signal XX2 and a signal YY3, timing and phases of a signal YY2 and a signal XX3 are adjusted and set by a timing circuit, a logic value of the signal YY3 is made 'L' and a logic value of the signal XX2 is made 'L' always, a logic value of the signal XX3 is made 'L' and a logic value of the signal YY2 is made 'L' always, and the reduction of current supply capability caused by the occurrence of a counter flow current to a charge pump circuit 8 from an output terminal 'to' is prevented. Therefore, current supply capability can be improved more than conventional ones by using capacitors C11-C14 of the prescribed capacity without increasing occupancy area of a capacity, the reduction of occupancy area of capacitors can be performed to satisfy conventional current supply capability, further, the capacity of the capacitors C11-C14 can be increased and high current supply capability can be provided without causing a counter flow current.
申请公布号 JP2003100077(A) 申请公布日期 2003.04.04
申请号 JP20010296142 申请日期 2001.09.27
申请人 SONY CORP 发明人 URAKAWA YOSHIAKI
分类号 G11C11/407;H01L21/822;H01L27/04;H02M3/07;(IPC1-7):G11C11/407 主分类号 G11C11/407
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