| 摘要 |
PURPOSE: A method for fabricating a structure of a flash memory cell is provided to eliminate a grain boundary vulnerable to an electric field concentration by forming a floating gate of a dual structure composed of a polycrystalline silicon layer and an amorphous silicon layer having fine grains on the polycrystalline silicon layer. CONSTITUTION: A tunneling oxide layer(22) is formed on a semiconductor substrate(21). The floating gate(28) composed of the first silicon layer and the second silicon layer on the first silicon layer is formed on the tunneling oxide layer. A dielectric layer(25) is formed on the floating gate. A control gate(27) is formed on the dielectric layer. An impurity region is formed in the semiconductor substrate at both sides of the control gate.
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