| 摘要 |
A time synchronization device and method for synchronizing an internal clock of the power monitor to a periodically stable frequency. Cycles of the periodically stable frequency are counted after each elapse of a predetermined time period. The elapse of the predetermined time period defines a present window and a previous window. A counting error and a change in counting error are calculated, wherein the change in counting error is the difference of a counting error calculated for the present window and a counting error calculated for the previous window. The present method detects when a change in counting error is within a predetermined range. When the counting error is within the predetermined range, the internal clock of the power monitor is adjusted to the line frequency according to the counting error calculated for the present window. In another embodiment, a time of the internal clock is synchronized to a universal time, the time of the internal clock advancing at a predetermined rate. First, the present device and method receives a time synchronization message from an entity at a first free running counter count. The time synchronization message contains the universal time when the time synchronization message was sent. Thereafter, the time synchronization message is processed at a second free running counter count to determine the universal time. The time of the internal clock is compared to the universal time plus a processing time which is determined by the difference between the second free running counter count and the first free running counter count. Finally, the predetermined rate of advance of the internal clock is adjusted if the internal time differs from the universal time plus the processing time.
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