| 摘要 |
PURPOSE: A fabrication method of a semiconductor device is provided to reduce plug resistance and to simplify manufacturing processes by performing single SAC(Self Aligned Contact) processing. CONSTITUTION: Word lines(43) having a hard mask(44) and a spacer(46) are formed on a substrate(41). After forming the first insulating layer(47), a bit line contact hole and a storage node contact hole are formed by selectively etching the first insulating layer(47). A bit line and storage node contact plug(50a,50b) are formed in the bit line and storage node contact hole, respectively. After forming the second insulating layer(51) on the resultant structure, a bit line damascene pattern is formed to expose the bit line contact plug(50a) by selectively etching the second insulating layer. A bit line(54) and a bit line hard mask(55) are sequentially formed in the bit line damascene pattern.
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