发明名称 TESTING METHOD AND APPARATUS OF GLITCH NOISE AND STORAGE MEDIUM
摘要 An A/D converter executes an A/D conversion of an inputted signal having a ramp waveform in response to a clock signal and sequentially stores digital output data into memories. In response to the clock signal, the storage data is read out from the memories. In a calculator, from certain data, data whose phase is delayed by one clock from such data is subtracted and a peak value of a subtraction value is detected by a peak detector. When the peak value lies within a range of ±1, it is determined that no glitch noise occurs. When the peak value exceeds the range of ±1, it is decided that the glitch noise has occurred.
申请公布号 US2003002573(A1) 申请公布日期 2003.01.02
申请号 US19980215193 申请日期 1998.12.18
申请人 TAKAHASHI KAZUYA 发明人 TAKAHASHI KAZUYA
分类号 G01R31/316;G01R19/00;H03M1/10;H03M1/12;(IPC1-7):H04Q1/20;H03D1/00;H04B3/46;H04B17/00;H04L27/06 主分类号 G01R31/316
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