| 摘要 |
A multiplier (310) multiplies a baseband signal with a scramble code generated by a CPICH scramble code generator (320) and an integrator (331) integrates the result of the multiplication. A symbol selection control unit (371) controls the integrator (331) such that the integrator (331) integrates each of two successive slots in which combinations of the symbols transmitted from two antennas of a base station are the same, in accordance with the information about the synchronous positions of the slots and frames. The result of the integration is delayed by a 1-symbol delay unit (340) and then a code of a complex component is inverted by a complex conjugate unit (350). A multiplier (360) multiplies the outputs of the integrator (331) and complex conjugate unit (350), which are shaped in a complex number, to obtain an amount of phase rotation between the successive symbols, i.e. a frequency error. <IMAGE> |
