发明名称 System and method for alternating standby mode
摘要 An apparatus and method for reducing the level of power consumption in an electronic device when the electronic device is operating in a standby mode or low-power mode. The level of power consumption is reduced by alternately shutting off standby power and turning on standby power to the electronic device. A standby cycle timer circuit is provided for automatically controlling the supply of standby power to the electronic device during standby mode. The standby cycle timer circuit becomes inactive when the electronic device resumes normal operation.
申请公布号 US6462437(B1) 申请公布日期 2002.10.08
申请号 US19990439195 申请日期 1999.11.12
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 MARMAROPOULOS GEORGE;WACYK IHOR T.
分类号 H04N5/63;H02J9/00;H02M3/28;H02M3/335;(IPC1-7):H02M3/335 主分类号 H04N5/63
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