发明名称 Nonvolatile memory device and refreshing method
摘要 At the data programming, plural data bit is transformed by a data transforming logic circuit into multi-value data according to the combination of bits, and the transformed data are sequentially transferred to a latch circuit connected to bit lines of a memory array. A program pulse is generated according to the latched data and is applied to a memory element at a state corresponding to the multi-value data. During data reading, the states of the memory elements are read out by changing the read voltage to intermediate values of individual threshold values and latched in a register. The original data may be restored by a data inverse transforming logic circuit based on the multi-value data stored in the register.
申请公布号 US6366495(B2) 申请公布日期 2002.04.02
申请号 US20010817021 申请日期 2001.03.27
申请人 HITACHI, LTD. 发明人 MIWA HITOSHI;KOTANI HIROAKI
分类号 G11C11/56;(IPC1-7):G11C11/34 主分类号 G11C11/56
代理机构 代理人
主权项
地址