发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To provide a non-volatile semiconductor memory in which time for verifying write-in is omitted by suppressing the increment of a write-in time caused by the increment of the parallel number of write-in by multiple-write-in and outputting the test result of write-in to the outside as it is in the same way as in automatic write-in. SOLUTION: This device has a write-in circuit 5 for writing simultaneously write-in data in memory cell arrays 1, 1... divided into a plurality of sectors S1, S2,...Sn-1, a data control circuit 9 performing a write-in test of agreement/ disagreement of data written in the memory cell arrays 1, 1... and data to be written in the memory cell arrays 1, 1... and holding pass/fail discrimination data for the memory cell arrays 1, 1..., and a logic circuit 3 and an operation control circuit 11 outputting the pass/fail discrimination data to the outside corresponding to the memory cell array 1 as time sequential data in accordance with an address signal of an external input.</p>
申请公布号 JP2001229682(A) 申请公布日期 2001.08.24
申请号 JP20000036794 申请日期 2000.02.15
申请人 NEC CORP 发明人 NINOMIYA KAZUHISA;SEKIGUCHI MITSURU
分类号 G06F12/16;G11C16/02;G11C16/10;G11C16/34;G11C29/34;(IPC1-7):G11C16/02;G11C29/00 主分类号 G06F12/16
代理机构 代理人
主权项
地址