发明名称 TRISTATE CIRCUIT FOR POWER UP CONDITIONS
摘要 <p>In an electronic circuit and/or component, such as a television, that requires a tri-state condition when the electronic circuit/component is powered up, a tri-state circuit may be employed. The present tri-state circuit includes a control circuit operably coupled to an enable input of a tristate buffer. During power-up of the electronic circuit, the control circuitry is operable to prevent data from passing from an input of the tri-state buffer to an output of the tri-state buffer until a predetermined time period wherein the control circuitry is operable to allow data to pass from the input to the output of the tri-state buffer.</p>
申请公布号 WO2001006655(A1) 申请公布日期 2001.01.25
申请号 US2000019258 申请日期 2000.07.14
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