发明名称 MULTILAYER SEMICONDUCTOR MODULE
摘要 <p>PROBLEM TO BE SOLVED: To reduce wiring delay and enable a high-speed operation by first using an interlayer connection wiring around a semiconductor chip in a multilayer semiconductor module for the purpose of single-to-multiple connection, and first using an interlayer connection wiring distant from the semiconductor chip for the purpose of one-to-one connection. SOLUTION: When a semiconductor chip 110 is connected to a wiring substrate 120, an input/output pad for single-to-multiple connection is connected to a through hole 130 around the semiconductor chip 110 with wiring 125, and an input/output pad for one-to-one connection is connected to a through hole 140 distant from the semiconductor chip 110 with a wiring 126. Wiring substrates 120 are stacked into a multilayer structure 160 by using connection layers 124. The input/output pad of the semiconductor chip 110 and an input/output terminal 150 are connected with the wirings 125 and 126, the through holes 130 and 140. By this constitution, the wiring delay is reduced, and a high-speed operation of a semiconductor module 100 can be realized.</p>
申请公布号 JPH10107205(A) 申请公布日期 1998.04.24
申请号 JP19960255804 申请日期 1996.09.27
申请人 HITACHI LTD 发明人 KAMIMURA TETSUYA;TANAKA KATSUYA;KATO TAKESHI;TOKUDA MASAHIDE
分类号 H05K3/46;H01L25/00;H01L25/065;H01L25/07;H01L25/18;(IPC1-7):H01L25/065 主分类号 H05K3/46
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