Stacked cell capacitor-containing integrated circuit production

摘要

A process for producing a semiconductor structure for ICs, especially DRAMs or FeRAMs, involves forming a stacked cell from a plug-filled via in an insulating layer (2) and applying a capacitor having a lower electrode (5) facing the plug (1), a paraelectric or ferroelectric dielectric (6) and an upper electrode (7). The novelty is that, after etching the via (9) and filling it with plug material (1), (a) a recess is formed in the plug material (1); (b) the plug material (1) and the surrounding insulating layer (2) are exposed to nitrogen-containing gas to form a silicon nitride layer (4) on the insulating layer (2) and a nitride barrier layer on the plug material (1) exposed in the recess; and then (c) the lower electrode (5), the dielectric (6) and the upper electrode (7) are successively applied and structured.