SIGNAL LINK TEST MESSAGE STRUCTURE IN THE COMMON CHANNEL SIGNALING NETWORK OF ELECTRONIC SWITCHING SYSTEM

摘要

a test form bit (5) allotted n x 8 (1< n <15) bits; a length display bit (6) which is located next to the test form bit (5) and is allotted 4 bits; a spare bit (7) which is located next to the length display bit (6) and is allotted 4 bits; a head sign H1 bit (8) allotted 4 bits; a head sign H2 bit (9) allotted 4 bits; a rooting label bit (10) which is located next to the head sign H2 bit and is allotted 32 bits.