SHIFT REGISTER HAVING PRIORITY PROCESSING FUNCTION, PACKET COMMUNICATION SWITCHING DEVICE USING IT, ATM NETWORK USING IT, PACKET COMMUNICATION SYSTEM HAVING PRIORITY PROCESSING AND ATM COMMUNICATION SYSTEM WITH PRIORITY PROCESSING

摘要

PURPOSE:To obtain a shift register for controlling a buffer sending an ATM cell stored in an ATM switching device while managing the ATM cell based on a dead line provided in the cell. CONSTITUTION:The system is provided with a comparator 53 comparing a dispatch time DPT0 of a received ATM cell with a dispatch time stored in a register 51. Registers 50, 51 are formed to be shifted in both ways (positive/ negative directions in gamma direction). A shift/write controller 54 shifts data with a larger dispatch time backward depending on the comparison result of a comparator 54 and data of the received ATM cell are written in a free space. Thus, data in the shift register are arranged in the order of smaller dispatch times from the front-most row of a stage.