| 摘要 |
The present invention relates to a signal processing apparatus for use in radars, which can detect a target from a receive signal by digital processing. An A-D converter samples the receive signal by a clock signal A, and quantizes the sampled value. A clock accelerator generates a clock signal B having a frequency which is N times a frequency of the clock signal A. A signal latch holds an output from the A-D converter for an N clock period of the clock signal B. A digital low-pass filter performs low-pass filtering processing with respect to an output from the signal latch with the clock signal B as an operating clock. As a result, an output from the digital low-pass filter includes a more approximate value of the maximum value in the receive signals. Therefore, it is possible to provide improved accuracy of the target detection by a target detector.
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