| 摘要 |
<p>PURPOSE:To make low-leakage and high-speed compatible by forming a low- leakage FET in an area containing fewer catalytic elements and a high-speed TFT in another area containing more catalytic elements. CONSTITUTION:After depositing an amorphous silicon film 23 on a silicon oxide film 22 formed on a substrate 21, an area 25 in which Ni is contained at a rate of 1X10<15>cm<-3> to 1X10<18>cm<-3> is formed by selectively implanting Ni ions into the film 23. After annealing the substrate 21, the formed area is crystallized by irradiating the area with a laser beam. Then a silicon oxide film 27 is formed as a gate insulating film after forming island-like silicon areas 26a and 26b. In addition, Al-gate electrodes 28a, 28b, and 28c and oxide layers 29a, 29b, and 29c are formed. Moreover, after forming an N-type impurity area 30a and P-type impurity areas 30b and 30c, the areas are activated by using a laser annealing method. Successively, picture element electrodes 32 are formed after forming a silicon oxide film 31 and electrode wiring 33a, 33b, 33c, 33d, and 33e are formed.</p> |
