发明名称 Multi-bit parallel switching networks.
摘要 <p>A switch having a non-blocking, self-routing switching fabric (41) for routing data packets from the input ports to the output ports of the switching fabric in accordance with a virtual circuit designation and an output port address that is carried by each data packet requires that the output port address for each of the data packets being specified by the first few bits of a switch header that is appended to said packet. The switching fabric (41) advantageously is composed of a plurality of parallel connected single bit wide sorting networks followed by a plurality of parallel connected routing networks for providing multi-bit wide data paths between its input ports and its output ports. Moreover, the switching fabric (41) is constructed to have one multi-bit wide sorting network and a plurality of multi-bit wide routing networks for giving plural input ports simultaneous access to identical output ports. For that reason, the address bits for each of the packets are transmitted in bit parallel on all bits of said multi-bit wide data path, together with a prepended stopper ID that distinquishes each data packet from any other data packet that can be simultaneously routed to the same output port of said switching fabric (41), thereby preventing data packets from different inputs from being intermingled at said output ports. &lt;IMAGE&gt;</p>
申请公布号 EP0571153(A2) 申请公布日期 1993.11.24
申请号 EP19930303776 申请日期 1993.05.17
申请人 XEROX CORPORATION 发明人 LYLES, JOSEPH B.
分类号 H04L12/56;(IPC1-7):H04L12/56 主分类号 H04L12/56
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