| 摘要 |
An OS signal generation circuitry comprises a plurality of OS signal generating circuits receiving corresponding address bits of an address so as to generate individual OS signals, respectively, which are supplied to an OR circuit for generating an original OS signal. This original OS signal is supplied to a rising detection circuit, which outputs a second OS signal generated on the basis of the detected rising of the original OS signal and having a substantially constant width. Another OR circuit receives the original OS signal and the second OS signal and generates an output OS signal having the constant OS width. Accordingly, the OS signal can have the OS width which does not vary dependently upon the number of address bits actually changing their logical level.
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