发明名称 PARALLEL BUFFER CONTROL METHOD
摘要 <p>PURPOSE:To prevent passing between short packets generated from division of one long packet by attaining transfer of one logical channel packet while being distributed to plural lines. CONSTITUTION:A reception time of a reception packet is stored in reception time recording buffers 40-1-40-3 at packet reception and when a packet is read from reception individual buffers 21-1 to 21-3 provided to lines 11-1 to 11-3, the reception time is read from the reception time recording buffer and a packet is read from the reception individual buffer at a fastest read time to prevent occurrence of run-over of packets in the reception individual buffers. Thus, short packets generated by dividing one long packet are transferred through plural lines to increase the maximum transfer speed of the single logic channel packet.</p>
申请公布号 JPH04309039(A) 申请公布日期 1992.10.30
申请号 JP19910102032 申请日期 1991.04.05
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 SATO KAZUHIRO;TAKEMOTO KENJI
分类号 H04L12/56;H04L29/02 主分类号 H04L12/56
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