| 摘要 |
<p>PURPOSE:To output a same data stably even when the phase of a clock fed to a multiplex circuit is fluctuated by providing an inverter inverting the clock and a clock transfer means. CONSTITUTION:A multiplex circuit 10 frequency-divides a clock 1 by using a timing pulse 1 to form a low-order group clock and to multiplex an input low-order group data, thereby outputting a high-order group data 1. A multiplex circuit 10 frequency-divides a clock 2 similarly and outputs a high-order group data 1, an inverter 30 inverters a low-order group clock, the result is supplied to a clock transfer means 40 and transferred to a low-order group clock generated respectively by the multiplex circuits 10, 20. Through such constitution above, a phase fluctuation close to a clock frequency division ratio is absorbed and the same data is outputted.</p> |
