| 摘要 |
PURPOSE:To detect a phase error with high accuracy by obtaining an absolute value of a signal at a signal point with a phase error detected at it and obtaining the mean value and the absolute value so as to extract an output by both adjacent points of the signal point only and including the signal information before and after the signal point to the said extracted output. CONSTITUTION:An input signal string to detect its phase error is inputted to a shift register 1, an absolute value (b) of a data (a) of the 2nd stage of the shift register 1 is obtained by an absolute value circuit 2, a means value (c) is obtained by an averaging circuit 3 and a subtractor 4 obtains a difference (d) between the absolute value (b) and the mean value (c). On the other hand, the data (a) of the 2nd stage of the shift register 1 is multiplied with the data of the 1st stage by a multiplier 5, its product is inputted to a multiplier 6, where the said product is multiplied with the difference (d) outputted from the subtractor 4, and the resulting product (e) is inputted to an output control circuit 8. Moreover, the data of the 1st stage of the shift register 1 is multiplied with the data of the 3rd stage at a multiplier 7, its product is inputted to an output control circuit 8, an output (e) of the multiplier 6 is outputted to an output side according to the product or interrupted therefrom. Thus, a clock phase error is detected with high accuracy. |
