发明名称 MEMORY CONTROL CIRCUIT
摘要 PURPOSE:To increase the speed of program processing by individually setting up memory reading time width in a slow access time circuit and a rapid access time circuit at the time of reading out the contents of the memory in a computer. CONSTITUTION:Plural ROM selecting signals CS0 to CSm to be applied to a ROM 9 through a power strobing circuit 11, a memory reading signal 7 and a machine clock 4 are connected to a machine clock control circuit 13. Since the ROM 9 is accessed by using the circuit 11, power supply rise time t2 + address setting-up time t3 is required until the determination of data. Therefore, the circuit 13 supplies a machine clock 14 to a CPU 3 after stopping the supply of one clock of the machine clock 4. Only at the time of accessing the ROM 9, the clock 4 in a ROM reading time T2 is divided into two clocks and the divided clock is used as a clock at the time of accessing a RAM 10, so that the memory reading time width in the program can be shortened.
申请公布号 JPH0267655(A) 申请公布日期 1990.03.07
申请号 JP19880219210 申请日期 1988.09.01
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAKAGAWA NOBUO
分类号 G06F12/06 主分类号 G06F12/06
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