发明名称 DATA PROCESSOR AND COMMUNICATION SYSTEM
摘要 <p>PURPOSE: To speed up a processing by receiving first data, interrupting the processing of a first process, accessing to a second register set and processing a second process. CONSTITUTION: At the time of the operation of a system, the selectors of respective CPU pick out the processes which can be executed among register sets R, R2.... A processor P executes an instruction for the selected process until access to one (for example) of memory banks M1, M2... is required. Then, the processor P typically sends a pertinent memory request for reading or writing a memory, and imposes conditions on one o flags F1, F2... so that the execution of the process is reported to be impossible. Then, the selector S selects the process which is flagged as that which can be executed, and which can be used next. Thus, the high speed processing can be executed.</p>
申请公布号 JPH025173(A) 申请公布日期 1990.01.10
申请号 JP19890006060 申请日期 1989.01.17
申请人 QUANTEL LTD 发明人 ROBIN AREKISANDAA KOOREI
分类号 G06F15/16;G06F9/44;G06F9/46;G06F9/52;G06F15/173;G06F15/177;G06F15/80 主分类号 G06F15/16
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