发明名称 DATA EXCHANGE AND MULTIPLEX SYSTEM
摘要 PURPOSE:To reduce the hardware quantity rand to reduce the average delay time of data by including information controlling exchange order in a header and applying continuously exchange and multiplex to the end of a series of mini-packet string without interrupting other call number into the header by means of the information. CONSTITUTION:The information generated from terminal equipments 31-33 is sent in a form of cell to signal lines 61-63. Moreover, a cell (d) including the voice information exchanged by a PBX and generated from a telephone set 35 exists in a signal line 64. In an exchange 71, after the cell a1 is changed on the signal line 61 and since the M of the cell a1 is logical 1 and the M of the cell b1 is logical 1, the cell a2 is exchanged successively, Since M=0 exists in the cell a3, the cell b1 is exchanged and then the exchange order is discriminated and the result is multiplexed after exchange. Thus, the hardware quantity for a reproduction buffer of the user frame and for order confirming logic at reproduction is saved remarkably.
申请公布号 JPH022270(A) 申请公布日期 1990.01.08
申请号 JP19880144525 申请日期 1988.06.10
申请人 HITACHI LTD 发明人 TAKIYASU YOSHIHIRO;OZAKI NAOHIKO
分类号 H04Q3/00;H04L12/28;H04L12/66;H04L12/931;H04L12/951 主分类号 H04Q3/00
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