发明名称 A data processor having multiple execution units for processing plural classes of instructions in parallel.
摘要 A data processor is disclosed which enables the selective simultaneous or asynchronous execution of mutually independent instructions of different classes in parallel coupled execution units and which enables the sequential execution of mutually dependent instructions of different classes by delaying the execution of a dependent instruction in a second execution unit until the completion of execution of a precursor instruction in a first execution unit. The instructions are dispatched to respective ones of a plurality of parallel coupled execution units, in accordance with their instruction class.
申请公布号 EP0312764(A2) 申请公布日期 1989.04.26
申请号 EP19880114878 申请日期 1988.09.12
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KARNE, RAMESH KUMAR;VEDULA, SASTRY SARVAMANGALA
分类号 G06F9/30;G06F9/38 主分类号 G06F9/30
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