发明名称 |
FOERFARANDE FOER TILLVERKNING AV EN HALVLEDARANORDNING MED EN HALVLEDARKROPP AV KISEL |
摘要 |
A method of manufacturing an integrated circuit having at least an insulated gate field effect transistor (IGFET). Provided on the silicon surface are successively a gate oxide layer and a doped silicon layer which are patterned by etching by means of a silicon nitride-containing mask which comprises the gate electrode(s) and interconnections. Nitrogen ions are implanted in the surface parts not underlying the mask. By thermal oxidation only the edges of the silicon pattern are oxidized. By ion implantation the source and drain zones are formed, the gate electrodes serving as an implantation mask. If desired, the threshold voltage may then be adjusted by ion implantation in the channel region via the gate electrode. The invention is of particular importance for the manufacture of complementary IGFET pairs in which a transistor is provided in a bowl-shaped zone which is bounded by a p-n junction terminating at the surface between a boron-doped p-type and an adjoining phosphorus-doped n-type channel stopper zone FIG. 15. |
申请公布号 |
SE458243(B) |
申请公布日期 |
1989.03.06 |
申请号 |
SE19810007651 |
申请日期 |
1981.12.21 |
申请人 |
NV PHILIPS' GLOEILAMPENFABRIEKEN |
发明人 |
J * SOLO DE ZALDIVAR |
分类号 |
H01L27/088;H01L21/033;H01L21/265;H01L21/28;H01L21/316;H01L21/321;H01L21/768;H01L21/8234;H01L21/8238;H01L27/092;H01L29/78;(IPC1-7):01L21/318 |
主分类号 |
H01L27/088 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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