| 摘要 |
PURPOSE:To simplify a circuit and to compress the scale of hardware, by performing the detection of specific bits on plural signal lines by multiplexing the specific bit detected on each signal line. CONSTITUTION:Specific bit detecting parts C1-C4 perform the detection of the specific bits by an inputted clock pulse (b) for detecting the specific bit. A multiplexing part D takes the gate of the pulse (d) of a bit timing and a multiplexing pulse (e), and extracts the parts of signals c1-c4. A counter part E outputs an output signal (g) when the count sum of a detected result outputted by a signal (f) arrives at (m). Thus, since the counter part E is constituted of one part, it is possible to detect the count sum of all of the signal lines comprehensively. Therefore, the state of the count sum on the plural signal lines can be detected as it is even when the count sum changes.
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