| 摘要 |
PURPOSE:To simplify a circuit constitution, and to reduce a circuit area, and in addition, to lower a power consumption and to enable a high speed operation by using a memory cell array as a storing means for inputted information, and selecting directly a memory cell by means of using a variable length shift register means as a selecting means in order to delay the said information for the set time portion and output it. CONSTITUTION:The memory cell of the memory cell array 1 is successively selected by a variable length circular shift register means 201-20k, and after the memory cells in a prescribed range are selected, it returns to the memory cell selected at first, and hereafter, the same affairs are repeated. The information inputted to an inputting means 4 is successively stored in the memory cell selected by the variable length circular shift register means 201-20¦, and the stored information is read out and outputted to the external part by an outputting means 5, when the said memory cell is selected again after the prescribed time elapses. Then, because the range of the memory cells, in which the variable length circular register means 201-20k repeatedly select can be changed by a controlling means, the delay time can be varied as well. Thus, the high speed operation comes possible by the simple circuit constitution and the low power consumption.
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