发明名称 BRANCHING INSTRUCTION DEBUGGING SYSTEM OF INFORMATION PROCESSING DEVICE
摘要 PURPOSE:To apply debug stop with a specified branching system instruction and eliminate excessive interruption and debug stop, by installing a debugging conditions assigning means, coincidence in instructions detecting means, etc. CONSTITUTION:When an instruction address previously set in a register 9 is executed, the same instruction address is stored in a register 8 and a coincidence output is obtained from a coincidence circuit 11. The output is sent as an instruction executing process advances at an instruction controlling section. Then, in the course of the execution processing of E1, the type, etc., of a branching system instruction and the set content of a register 2 are checked at a coincidence circuit 14. When coincidence with the set content of the circuit 2 is obtained, a signal applying debug interruption or degub stop to an interrupting circuit 15 or debug stop circuit 16 is sent out. Therefore, since the type of a branching instruction and assignment of an external condition at the time of execution of the instruction can be set, excessive interruptions, etc., can be eliminated.
申请公布号 JPS59174955(A) 申请公布日期 1984.10.03
申请号 JP19830050007 申请日期 1983.03.25
申请人 FUJITSU KK 发明人 KOIKE AKISUMI
分类号 G06F11/28;G06F11/36 主分类号 G06F11/28
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