发明名称 PROGRAMMABLE TIMING AND SYNCHRONIZATION CIRCUIT FOR A TDMA COMMUNICATIONS CONTROLLER
摘要 The disclosed circuit employs a single programmable timer and address decoder which identifies a plurality of bursts received from other stations in a TDMA communications network by means by identifying their origin addresses, and then starts associated timing intervals in the programmable timer for each burst. The instant when the intervals being timed terminate, corresponds approximately to the instant at which the local station should commence its transmission burst. The programmable timer and synchronizer associates each of a plurality of timing intervals with each of the plurality of transmitting stations in the TDMA network, and terminates each respective interval at approximately the same instant in a given local station, thus allowing the time for commencement of the local station's transmission burst to be reliably determined without regard for the participation of any more than one other of the plurality of transmitting stations in the TDMA network. This enables a TDMA communications system to be democratically synchronized in a reliable manner.
申请公布号 DE3466457(D1) 申请公布日期 1987.10.29
申请号 DE19843466457 申请日期 1984.12.14
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 COSTES, MICHEL LEON;HODGE, GENE DALE
分类号 H04B7/212;(IPC1-7):H04J3/06;H04B7/185 主分类号 H04B7/212
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