| 摘要 |
PURPOSE:To improve the operating speed and to reduce the short channel effect of a complementary MIS transistor by performing separate steps of activating P-type source/drain and N-type source/drain to form the transistor having low resistance P-type source/drain and shallow N-type source/drain. CONSTITUTION:An N-channel transistor region is masked with a resist 7, and a boron implanted layer 6 is formed by ion implantation in a P-well 2. Then, it is heat-treated at high temperature for a short time to form P-type source/ drain 8. Then, the P-channel transistor region is masked with resist 7, and a phosphorus implanted layer 9 is formed by ion implantation in an N-type substrate 1. After the resist 7 is then removed, a heat treatment is performed at low temperature in a short time. N-type source/drain 10 is formed by the heat treatment, and an excellent transistor in which redistribution is reduced and a short channel effect is small due to the low temperature heat treatment can be formed. |
