发明名称 SIGNAL PROCESSING CIRCUIT FOR HIGH-DEFINITION TELEVISION RECEIVER
摘要 PURPOSE:To obtain a normal freeze picture independently of the movement of a picture by providing a means for storing the storage of a field memory for interpolation between fields and outputting continuously the information in the field memory to prevent resolution from deteriorating. CONSTITUTION:When the 3rd switch circuit 31 is connected, an output of the 3rd field memory 34 is fed back to the input of the field memory 24 and the information in the field memory 24 is held. When the 4th switch circuit 32 is connected, the information of the existing field from a mixer 21 is cut off and the information in the 3rd field memory 24 is led to an interpolation filter 25 as the existing field information. Thus, the same information as the existing field information and the information before one field is led to the interpolation filter 25. An inter-field interpolation cut off signal deciding whether or not the inter-field interpolation is applied in the interpolation filter 25 is used to stop the inter-field interpolation or apply the interpolation in field and the stop the inter-filed interpolation or apply the interpolation in field and the said signal is outputted repetitively.
申请公布号 JPS6251390(A) 申请公布日期 1987.03.06
申请号 JP19850189557 申请日期 1985.08.30
申请人 HITACHI LTD 发明人 KATSUMATA KENJI;KOJIMA NOBORU;HORIUCHI SUNAO;SUGIYAMA MASAHITO;NAKAGAWA HIMIO
分类号 H04N7/00;H04N7/015 主分类号 H04N7/00
代理机构 代理人
主权项
地址